Technical Field
The present disclosure relates to a synthetic test circuit for a valve performance test of high-voltage direct current (HVDC). More particularly, the present disclosure relates to a synthetic test circuit which artificially applies current and voltage similar to those appearing at an IGBT (insulated-gate bipolar transistor) valve when an MMC (Modular Multilevel Converter) based voltage source HVDC operates normally and abnormally, to an IGBT valve module which is independent from a converter, capable of performing a variety of tests.
Description of the Related Art
FIG. 1 is a view illustrating an example of a synthetic test circuit for a valve performance test in the art.
A synthetic test circuit for a voltage source HVDC illustrated in FIG. 1 is configured of two (2) sets of test valves (Test valve 1 and Test valve 2) each including several sub-modules connected serially, a DC power source E to charge a capacitor of the test valve, two (2) auxiliary valves (Auxiliary valve 1 and Auxiliary valve 2) to supplement the loss occurred when operating the synthetic test circuit, two (2) auxiliary DC power sources (E1 and E2) to charge a capacitor of each auxiliary valve, and a reactor L serially connected between the test valves to simulate a pseudo-sinusoidal current flowing between valves when an MMC (Modular Multilevel Converter) actually operates.
A sub-module is configured of a capacitor and two (2) serially connected IGBTs, the capacitor and two IGBTs being connected in parallel. The first test valve and the second test valve each are configured of m serially connected sub-modules and n serially connected sub-modules. The auxiliary valves each are configured of one sub-module, and in order to charge the capacitor of the auxiliary valve, the each capacitor is in parallel connected to an auxiliary DC power source. The synthetic test circuit for a voltage source HVDC should be able to simulate a waveform of a current flowing through a sub-module when actually operating an MMC for the current flowing through the test valve, in the same manner. The system of FIG. 1 generates a pseudo-sinusoidal current waveform using a resonance of a capacitor of a test valve and an inductor located between respective test valves, and tests the test valve using the pseudo-sinusoidal current waveform.
FIGS. 2 to 4 are views illustrating operations of synthetic test circuits for a valve performance test in the art.
Referring to FIGS. 2 to 4, as illustrated in FIG. 2 first, after setting output voltages u1 and u2 of test valves that may generate a magnitude and a frequency of a current to be simulated in the synthetic test circuit, a capacitor of an auxiliary valve is charged using E1 and E2. Next, as illustrated in FIG. 3, after charging the capacitor of the test valve using E, all power sources are separated from the valves. Then, as illustrated in FIG. 4, using an output voltage of the test valve that is suitably generated, a current to be simulated is generated.
FIG. 5 is a view illustrating a configuration of a test valve, FIG. 6 is a view illustrating an output voltage of a test valve, FIG. 7 is a view illustrating an equivalent circuit of a synthetic test circuit, and FIG. 8 is a view illustrating a voltage of an inductor.
The principle to generate a current flowing through an actual test valve may be explained using a configuration of a test valve and an output voltage illustrated in FIGS. 5 and 6, an equivalent circuit of a synthetic test circuit illustrated in FIG. 7 and an inductor voltage UL illustrated in FIG. 8.
When suitably turning on or off each switch state of the test valve configured of m sub-modules illustrated in FIG. 5, 0 to VSM11*m[V] voltage may be generated as illustrated in FIG. 6. When serially connected sub-modules of the test valve are five (5) in number, an equivalent circuit of the synthetic test circuit may be indicated as illustrated in FIG. 7. Further, when a pseudo-sinusoidal voltage illustrated in FIG. 8 is applied to an inductor L located between the test valves by regulating a phase of u2, the current flowing through the reactor also may become a pseudo-sinusoidal wave. By doing that, it may be possible to enable a current whose type is similar to an AC component of the current flowing through the sub-module when actually operating the MMC, to flow through the test valve. However, there is a limitation that it is not possible to enable a DC component included on an actual MMC operation to flow.
The synthetic test circuit for a voltage source HVDC valve test is configured of two (2) test valves and two (2) auxiliary valves. The auxiliary valve serves to supplement the loss occurred in the test valve when operating the synthetic test circuit. While a sub-module capacitor and an auxiliary valve capacitor of the test valve should be charged before testing the test valve, there is a problem that a DC power source to charge the test valve and two DC power sources to charge an auxiliary valve are needed, that is, three (3) DC power sources are needed in total. Further, since a test current is generated using a resonance of a capacitor and an inductor of the test valve, there is a problem that it is not possible to generate a waveform of a pseudo-sinusoidal current including a DC offset current flowing through an individual sub-module when actually operating the MMC. Additionally, while the current flowing through each IGBT and diode has a PWM form when actually operating the MMC, there is a problem that such a current shape cannot be embodied.